

- Semiconductor Packaging Test Handler System
An advanced final test (FT) handler for MEMS sensors and Memory/MCU:
JEDEC tray-compatible material handling
Array-type pick-and-place with 64 independently controlled nozzles
Nitrogen-free programmable tri-temperature system (±0.5°C precision)
Modular test stimulation chambers for sensor calibration
Mass production-proven performance with 40000+ UPH efficiency
